Programmable Logic Device

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A GAL22V10 ________.

A GAL22V10 ________.
  • A. has up to 32 inputs and 10 outputs
  • B. is a type of SPLD
  • C. has 10 inputs and 22 outputs
  • D. is downloadable from the manufacturer's Web site
  • Correct Answer: Option B

A macrocell is ________.

A macrocell is ________.
  • A. part of a PAL or GAL
  • B. a type of one-time programmable SPLD
  • C. an example of intellectual property
  • D. a logic array block
  • Correct Answer: Option A

The Boolean expression (A + B)(C + D) is an example of ________.

The Boolean expression (A + B)(C + D) is an example of ________.
  • A. LAB
  • B. LUT
  • C. SOP
  • D. POS
  • Correct Answer: Option D

The Boolean expression AB + CD is an example of ________.

The Boolean expression AB + CD is an example of ________.
  • A. PAL
  • B. GAL
  • C. SOP
  • D. POS
  • Correct Answer: Option C

The final step in a design flow in which the logic design is implemented in the target device is called ________.

The final step in a design flow in which the logic design is implemented in the target device is called ________.
  • A. design entry
  • B. simulation
  • C. downloading
  • D. compiling
  • Correct Answer: Option C

The process or sequence of all operations carried out to ultimately program a target device is called the ________.

The process or sequence of all operations carried out to ultimately program a target device is called the ________.
  • A. graphic entry
  • B. LAB
  • C. downloading
  • D. design flow
  • Correct Answer: Option D

An application program in the development software package that controls the operation of the software is called a ________.

An application program in the development software package that controls the operation of the software is called a ________.
  • A. compiler
  • B. bed-of-nails
  • C. boundary scan
  • D. primitive
  • Correct Answer: Option A

A method for the automated testing of printed circuit boards is called a(n) ________.

A method for the automated testing of printed circuit boards is called a(n) ________.
  • A. bed-of-nails
  • B. LUT
  • C. CLB
  • D. CPLD
  • Correct Answer: Option A

A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmer interconnect that is used to connect internal logic modules is called a ________.

A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmer interconnect that is used to connect internal logic modules is called a ________.
  • A. bed-of-nails
  • B. boundary scan
  • C. CLB
  • D. CPLD
  • Correct Answer: Option C

A complex programmable logic device that consists of multiple SPLD arrays with programmable interconnections is called a ________.

A complex programmable logic device that consists of multiple SPLD arrays with programmable interconnections is called a ________.
  • A. bed-of-nails
  • B. boundary scan
  • C. CLB
  • D. CPLD
  • Correct Answer: Option D

Which of the following testing procedures uses the JTAG IEEE standard?

Which of the following testing procedures uses the JTAG IEEE standard?
  • A. Bed-of-nails
  • B. Flying probe
  • C. EXTEST
  • D. Boundary scan
  • Correct Answer: Option D

Which of the following testing procedures has one or more external moving parts?

Which of the following testing procedures has one or more external moving parts?
  • A. Bed-of-nails
  • B. Flying probe
  • C. EXTEST
  • D. Boundary scan
  • Correct Answer: Option B

The final step in the device programming sequence is ________.

The final step in the device programming sequence is ________.
  • A. compiling
  • B. downloading
  • C. simulation
  • D. synthesis
  • Correct Answer: Option B

Cascade chains are closely associated with ________.

Cascade chains are closely associated with ________.
  • A. CLBs
  • B. SOP functions
  • C. logic expansion
  • D. all of the above
  • Correct Answer: Option D

CLB is the acronym for ________.

CLB is the acronym for ________.
  • A. Configurable Logic Block
  • B. Configurable Logic Buffer
  • C. Critical Logic Buffer
  • D. Constant Logic Buffer
  • Correct Answer: Option A
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