Flip-Flops

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The asynchronous inputs are normally labeled ________ and ________, and are normally active-________ inputs.

The asynchronous inputs are normally labeled ________ and ________, and are normally active-________ inputs.
  • A. PRE, CLR, LOW
  • B. ON, OFF, HIGH
  • C. START, STOP, LOW
  • D. SET, RESET, HIGH
  • Correct Answer: Option A

The toggle mode is the mode in which a(n) ________ changes states for each clock pulse.

The toggle mode is the mode in which a(n) ________ changes states for each clock pulse.
  • A. logic level
  • B. flip-flop
  • C. edge-detector circuit
  • D. toggle detector
  • Correct Answer: Option B

The ________ is the time interval immediately following the active transition of the clock signal.

The ________ is the time interval immediately following the active transition of the clock signal.
  • A. hold time
  • B. setup time
  • C. over-time
  • D. hang-time
  • Correct Answer: Option A

In synchronous systems, the exact times at which any output can change state are determined by a signal commonly called the ________.

In synchronous systems, the exact times at which any output can change state are determined by a signal commonly called the ________.
  • A. traffic
  • B. D
  • C. flip-flop
  • D. clock
  • Correct Answer: Option D

The action of ________ a FF or latch is also called resetting.

The action of ________ a FF or latch is also called resetting.
  • A. breaking
  • B. clearing
  • C. freeing
  • D. changing
  • Correct Answer: Option B

Which is not a real advantage of HDL?

Which is not a real advantage of HDL?
  • A. Using higher levels of abstraction
  • B. Tailoring components to exactly fit the needs of the project
  • C. The use of graphical tools
  • D. Using higher levels of abstraction and tailoring components to exactly fit the needs of the project
  • Correct Answer: Option C

In VHDL, how is each instance of a component addressed?

In VHDL, how is each instance of a component addressed?
  • A. A name followed by a colon and the name of the library primitive
  • B. A name followed by a semicolon and the component type
  • C. A name followed by the library being used
  • D. A name followed by the component library number
  • Correct Answer: Option A

Which is not an Altera primitive port identifier?

Which is not an Altera primitive port identifier?
  • A. clk
  • B. ena
  • C. clr
  • D. prn
  • Correct Answer: Option C

In VHDL, how many inputs will a primitive JK flip-flop have?

In VHDL, how many inputs will a primitive JK flip-flop have?
  • A. 2
  • B. 3
  • C. 4
  • D. 5
  • Correct Answer: Option D

In VHDL, in which declaration section is a COMPONENT declared?

In VHDL, in which declaration section is a COMPONENT declared?
  • A. Architecture
  • B. Library
  • C. Entity
  • D. Port map
  • Correct Answer: Option A

A positive edge-triggered J-K flip-flop is used to produce a two-phase clock. However, when the circuit is operated it produces erratic results. Close examination with a scope reveals the presence of glitches. What causes the glitches, and how might the problem be corrected?

A positive edge-triggered J-K flip-flop is used to produce a two-phase clock. However, when the circuit is operated it produces erratic results. Close examination with a scope reveals the presence of glitches. What causes the glitches, and how might the problem be corrected?
  • A. The PRESET and CLEAR terminals may have been left floating; they should be properly terminated if not being used.
  • B. The problem is caused by a race condition between the J and K inputs; an inverter should be inserted in one of the terminals to correct the problem.
  • C. A race condition exists between the Q and Q outputs to the AND gate; the AND gate should be replaced with a NAND gate.
  • D. A race condition exists between the clock and the outputs of the flip-flop feeding the AND gate; replace the flip-flop with a negative edge-triggered J-K Flip-Flop.
  • Correct Answer: Option D

A push-button switch is used to input data to a register. The output of the register is erratic. What could be causing the problem?

A push-button switch is used to input data to a register. The output of the register is erratic. What could be causing the problem?
  • A. The power supply is probably noisy.
  • B. The switch contacts are bouncing.
  • C. The socket contacts on the register IC are corroded.
  • D. The register IC is intermittent and failure is imminent.
  • Correct Answer: Option B

Which of the following is not generally associated with flip-flops?

Which of the following is not generally associated with flip-flops?
  • A. Hold time
  • B. Propagation delay time
  • C. Interval time
  • D. Set up time
  • Correct Answer: Option C

Which of the following best describes the action of pulse-triggered FF’s?

Which of the following best describes the action of pulse-triggered FF’s?
  • A. The clock and the S-R inputs must be pulse shaped.
  • B. The data is entered on the leading edge of the clock, and transferred out on the trailing edge of the clock.
  • C. A pulse on the clock transfers data from input to output.
  • D. The synchronous inputs must be pulsed.
  • Correct Answer: Option B

Which of the following is correct for a D latch?

Which of the following is correct for a D latch?
  • A. The output toggles if one of the inputs is held HIGH.
  • B. Q output follows the input D when the enable is HIGH.
  • C. Only one of the inputs can be HIGH at a time.
  • D. The output complement follows the input when enabled.
  • Correct Answer: Option B
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