instruction level parallelism

MCQsQuestion.com has 14 Question/Answers about Topic instruction level parallelism

Branch-selected entries in a (2,2) predictor, which is having a total of 8K-bits in prediction buffer are

Branch-selected entries in a (2,2) predictor, which is having a total of 8K-bits in prediction buffer are
  • A. 1K
  • B. 2K
  • C. 3K
  • D. 4K
  • Correct Answer: Option A

Branch-target buffer having a single variation for storing one or more target instructions instead, or in addition to predicted

Branch-target buffer having a single variation for storing one or more target instructions instead, or in addition to predicted
  • A. Read address
  • B. Write address
  • C. Target address
  • D. both a and b
  • Correct Answer: Option C

Between instruction ADD.D and instruction SUB.D, there is

Between instruction ADD.D and instruction SUB.D, there is
  • A. Dependence
  • B. Anti-dependence
  • C. Correlation
  • D. Scheduling
  • Correct Answer: Option B

Actual dataflow values among instructions, which produce results and those that consume those results, is known as

Actual dataflow values among instructions, which produce results and those that consume those results, is known as
  • A. Control flow
  • B. Control hazard
  • C. Data hazard
  • D. Data flow
  • Correct Answer: Option D

10-bit history is used for allowing patterns of up to

10-bit history is used for allowing patterns of up to
  • A. 10 branches
  • B. 9 branches
  • C. 8 branches
  • D. 7 branches
  • Correct Answer: Option A

Out-of-order execution of program, tends to introduce possibility of

Out-of-order execution of program, tends to introduce possibility of
  • A. WAW hazards
  • B. WAR hazards
  • C. Data hazards
  • D. both a and b
  • Correct Answer: Option D

If straight-line code is generated by un-rolling, then this stated technique, is known as

If straight-line code is generated by un-rolling, then this stated technique, is known as
  • A. Global scheduling
  • B. Local scheduling
  • C. Post scheduling
  • D. Pre scheduling
  • Correct Answer: Option B

Primary challenge for every multiple-issue processors is trying to exploiting large amount of

Primary challenge for every multiple-issue processors is trying to exploiting large amount of
  • A. IP
  • B. FLP
  • C. FP
  • D. ILP
  • Correct Answer: Option D

Maximum performance measurement, attainable by implementation is

Maximum performance measurement, attainable by implementation is
  • A. Ideal pipeline CPI
  • B. Ideal pipeline CDI
  • C. Ideal pipeline CDA
  • D. Initial pipeline CPI
  • Correct Answer: Option A

Operation for performing on source operands, S1 and S2 is given by well-known field,

Operation for performing on source operands, S1 and S2 is given by well-known field,
  • A. Op
  • B. Qj
  • C. Qk
  • D. Vj
  • Correct Answer: Option A

By-passing and Forwarding techniques, reduces the

By-passing and Forwarding techniques, reduces the
  • A. Potential data hazard stalls
  • B. Control hazard stalls
  • C. Data hazard stalls
  • D. Ideal CPI
  • Correct Answer: Option A

An alternative towards fine-grained multithreading, devised technique was

An alternative towards fine-grained multithreading, devised technique was
  • A. Buffer-grained multi threading
  • B. Miss-grained multi threading
  • C. Coarse-grained multi threading
  • D. Coarse-grained single threading
  • Correct Answer: Option C

Attempts for predicting result of a computation used technique, is called

Attempts for predicting result of a computation used technique, is called
  • A. Data prediction
  • B. Flow prediction
  • C. Value prediction
  • D. Line prediction
  • Correct Answer: Option C

When branches are being mis-predicted; hazard which is raised due to this issue, is known as

When branches are being mis-predicted; hazard which is raised due to this issue, is known as
  • A. Control hazard
  • B. Data hazard
  • C. Stall
  • D. None
  • Correct Answer: Option A