computer memory review

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When Cycle per instruction is 1.0, data accesses are 50% of total instructions, and miss penalty is 25clock-cycles and miss rate having 2%, then computer would faster as,

When Cycle per instruction is 1.0, data accesses are 50% of total instructions, and miss penalty is 25clock-cycles and miss rate having 2%, then computer would faster as,
  • A. 1.25
  • B. 1.45
  • C. 1.75
  • D. 1.85
  • Correct Answer: Option C

Average access time of memory for having memory-hierarchy performance is given as

Average access time of memory for having memory-hierarchy performance is given as
  • A. Average memory access time = Hit time + Miss rate
  • B. Average memory access time = Hit time + Miss rate
  • C. Average memory access time = Hit time + Miss rate + Miss penalty
  • D. Average memory access time = Hit time + Miss rate - Miss penalty
  • Correct Answer: Option B

Fixed-size blocks known as pages, and those having variable-size blocks are known as

Fixed-size blocks known as pages, and those having variable-size blocks are known as
  • A. Segment
  • B. Page size
  • C. Physical addresses
  • D. Virtual memory
  • Correct Answer: Option A

Assume that hit-time is single clock cycle, independent of size of block, and then 16-byte block in a 4 KB cache will be having access-time of

Assume that hit-time is single clock cycle, independent of size of block, and then 16-byte block in a 4 KB cache will be having access-time of
  • A. 6.027 clock cycles
  • B. 8.077 clock cycles
  • C. 7.027 clock cycles
  • D. 8.027 clock cycles
  • Correct Answer: Option D

Virtually indexer’s limitation, saying that a cache which is direct-mapped can have a size no bigger than the

Virtually indexer’s limitation, saying that a cache which is direct-mapped can have a size no bigger than the
  • A. Page size
  • B. Frame size
  • C. Cache
  • D. Block
  • Correct Answer: Option A

If a set has n blocks, cache placement is then called

If a set has n blocks, cache placement is then called
  • A. 2-way set distributive
  • B. 2-way set associative
  • C. n-way setting
  • D. n-way set associative
  • Correct Answer: Option D

If cache is not able for containing all blocks needed while execution, miss is then known as

If cache is not able for containing all blocks needed while execution, miss is then known as
  • A. Hit miss
  • B. Cache miss
  • C. Cache hit
  • D. Hit rate
  • Correct Answer: Option B

As segment or a page is normally used for block, page-fault and address-fault is used for

As segment or a page is normally used for block, page-fault and address-fault is used for
  • A. Hit
  • B. Miss
  • C. Cache
  • D. Stack
  • Correct Answer: Option B

If entry is 8 bytes long, each page table has 512 entries, and Opteron has 4 KB pages. Each of four level fields are 9 bits long, and page offset is 12 bits, then sign extended would be

If entry is 8 bytes long, each page table has 512 entries, and Opteron has 4 KB pages. Each of four level fields are 9 bits long, and page offset is 12 bits, then sign extended would be
  • A. 16 bits
  • B. 32 bits
  • C. 64 bits
  • D. 128 bits
  • Correct Answer: Option A

AMD64 requires that upper 16 bits of virtual address be just sign extension of lower 48 bits, which it calls

AMD64 requires that upper 16 bits of virtual address be just sign extension of lower 48 bits, which it calls
  • A. Rephrasing
  • B. Canonical form
  • C. Trojan horses
  • D. Block size
  • Correct Answer: Option B

64-bit virtual address of AMD64 architecture is mapped onto

64-bit virtual address of AMD64 architecture is mapped onto
  • A. 64 bits physical addresses
  • B. 32 bits physical addresses
  • C. 52 bits physical addresses
  • D. 128 bits physical addresses
  • Correct Answer: Option C

Cache term is now applied when a buffering is employed for reusing commonly occurring items, for example

Cache term is now applied when a buffering is employed for reusing commonly occurring items, for example
  • A. File caches
  • B. Name cache
  • C. Flash memory
  • D. Both a and b
  • Correct Answer: Option D

Virtual memory producing virtual-addresses, are translated by

Virtual memory producing virtual-addresses, are translated by
  • A. Logical addresses
  • B. Local addresses
  • C. Physical addresses
  • D. All above
  • Correct Answer: Option C

IA-32 allows operating system to maintain protection level of called

IA-32 allows operating system to maintain protection level of called
  • A. Rings
  • B. Frames
  • C. Pages
  • D. Routine
  • Correct Answer: Option D

Cutting of physical-memory into form of blocks and allocating them to different processes, stated technique is known as

Cutting of physical-memory into form of blocks and allocating them to different processes, stated technique is known as
  • A. Read back
  • B. Cache miss
  • C. Cache hit
  • D. Virtual memory
  • Correct Answer: Option D
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